A portable information processing device, such as a notebook computer, personal digital assistant (PDA), or digital camera, records large quantities of digital data, such as image data, in an internal recording medium. A recording medium that is compact, lightweight and has a large-recording-capacity is desirable. In particular, a portable information processing device, such as a digital video camera (DVC) or an audio player, must record or reproduce large quantities of data from a recording medium in real time. Accordingly, a recording medium that can manipulate large quantities of data at a high speed is desirable.
Furthermore, a portable information processing device must operate for a long period of time using only an internal power supply such as a battery. Accordingly, a recording medium that reduces power consumption during input/output and storing of data is desirable.
In addition, portable information processing devices must exchange data among various other information processing devices. For example, image data taken with a digital still-video camera (DSC) may be printed using a printer, subjected to digital processing using a personal computer, transmitted using a cellular phone, or reproduced on a television screen. Accordingly, a recording medium that facilitates the sharing of data among the various information processing devices is desirable.
Examples of recording media that meet the above-mentioned requirements include semiconductor memories, flexible disks, hard disks, optical disks, and soon. In particular, card-type recording media with built-in flash memories, such as PC cards, (which are hereafter referred to as flash memory cards) are typical. In use, a flash memory card is inserted into the specific slot of the information processing device and exchanges data with the information processing device. The specific slot arrangement complies with a predetermined standard for flash memory cards. The information processing devices with the specific slots can exchange data with each other through the same flash memory card.
In contrast to a RAM, a flash memory can hold data stored therein for a long time without power consumption. Furthermore, a flash memory can electrically rewrite data in contrast to a ROM. In those respects, a flash memory has advantages as the above-mentioned recording medium over a RAM and a ROM.
A flash memory is generally divided into more than one page each having a fixed number of memory cells, and further divided into more than one physical block each having a fixed number of the pages. Each of the memory cells can assume two states, “1” and “0”. Therefore, each one of the memory cells can store one-bit data therein. The memory cell of a flash memory, NAND-type flash memory for example, comprises the characteristics related to the transition between two states, “1” and “0”. The memory cells in the “1” state can change into the “0” state one by one. On the other hand, the memory cells in the “0” state can change into the “1” state only when all the cells belonging to the same physical block change collectively. Therefore, data stored in the flash memory can only be erased collectively in each of the physical blocks. As used above, data is “erased” by initializing of all the memory cells inside the physical block into the “1” state. On the other hand, data writing into the flash memory is enabled on the data-erased pages. As used above, “data writing” means causing some of the memory cells to change from the “1” state to the “0” state.
The flash memory cannot overwrite data with new data on the same page in which data has already been stored. The reason is as follows: in the NAND-type flash memory, for example, the memory cells in the “0” state cannot individually change into the “1” state. Accordingly, overwriting of data with other data on the same page requires prior erasing of data in the whole of the physical block including the page. Accordingly, the time required for the overwriting of the flash memory is longer than that of a RAM, with the difference being the time required for the erasing of the data.
For example, Published Japanese patent application No. H6-301601 gazette discloses a storage device that achieves high-speed data writing into flash memories. The storage device writes data into more than one flash memory or more than one physical block in parallel, thereby shortening the writing duration.
FIG. 10 is the block diagram showing an example of data exchange between a conventional flash memory card 100 and an information processing device H (which is hereafter referred to as a host). The flash memory card 100 is connected with the host H through, for example, 5 types of lines; a data line DAT, a clock line CLK, a power line VDD, a ground line VSS, and a command line CMD.
A host interface 1 receives commands from the host H through the command line CMD and decodes the commands. When the command is a write command, for example, the host interface 1 decodes the command into a logical address AL provided by the host H as the writing destination of data, and sends the address to the flash memory controller 30. On the other hand, the host interface 1 receives data objects Da to be written from the data line DAT and stores the objects in a buffer 2.
In the flash memory controller 30, an address conversion section 30a is fed from the host interface 1 with the logical address AL representing the destination of the data object Da. The address conversion section 30a brings the physical addresses of generally more than one area into correspondence with one logical address. Here, one area is equivalent to, for example, two pages inside the cell array 4b of the flash memory 4. In particular, the pages belonging to the same area each belong to separate physical blocks. The address conversion section 30a further classifies a plurality of the areas corresponding to the same logical address into three states; blank, enabled, and disabled states. Information about the state of each of the areas is stored in a redundant area added to each of the pages of the flash memory 4. Here, the redundant area consists of a fixed number of the memory cells. Furthermore, the common information about the state of the area is stored in the redundant areas of the pages belonging to the same area. The blank state represents that data has not yet been written in the area after erasing of data. On the other hand, the enabled and disabled states are the states of the area in which data is written. The enabled and disabled states represent respectively, that the read section 30b is allowed to perform reading of data and prohibited from performing reading of data. The address conversion section 30a, when fed the logical address AL representing the writing destination of the data object Da, selects a blank area in the cell array 4b and assigns the write target area of the data object Da to the blank area. The address conversion section 30a further brings the physical address AP of the area in correspondence with the above-mentioned logical address AL.
A write section 30c sends the physical address AP of the write target area to the address decoder 4c of the flash memory 4. In conjunction with that, the write section 30c sends the data object Da from the buffer 2 to the page buffer 4a of the flash memory 4.
A flash memory 4 comprises, for example, two page buffers 4a. Each of the page buffers 4a can store one page of data. In other words, the two page buffers 4a can store one area of data in total. Accordingly, the data objects Da to be written, which are sent out from the buffer 2, are stored in the page buffers 4a on an area-by-area basis. The one-area of data items stored in the two page buffers 4a are written in parallel onto the two pages designated by the address decoder 4c. Thus, the conventional flash memory card 100 performs the data writing into the flash memory 4 in the two physical blocks in parallel, thereby shortening the writing duration.
The address conversion section 30a, when fed the logical address AL representing the writing destination of the data object Da, retrieves data from an enabled area among the physical addresses corresponding to the logical address AL, together with the above-mentioned operations. When the writing operation ordered by the host is an overwriting operation, an enabled area generally exists among the areas that have the physical addresses corresponding to the logical address AL representing the writing destination of the data object Da. At the same time, a page-disabling section 30e inside the flash memory controller 30 disables the enabled area as described below, thereby prohibiting the read section 30b from accessing the area. The page-disabling section 30e rewrites the data inside the redundant area corresponding to the enabled page, thereby disabling the page. For example, the section defines the page state as being enabled and disabled when a predetermined bit (which is hereafter referred to as a flag) inside the redundant area is “1” and “0”, respectively. Since the flag corresponding to the enabled page is “1”, the page-disabling section 30e changes the flag from “1” into “0”. In other words, the section writes “0” into the flag of the redundant area. Thereby disabling the page.
As described above, the conventional flash memory card 100, when requested by a host to overwrite data, writes new data in another area without erasing original data. Furthermore, the card brings the physical address of the area in which the new data is written into correspondence with the logical address showing the writing destination. In addition, the card disables the state for the areas in which the original data is stored. Consequently, the read section 30b, when receiving a read command aimed at the logical address from the host, accesses the area in which the latest data items are stored among a plurality of the areas corresponding to the logical address. Thus, the overwriting at the same logical address is realized without erasing of data in the flash memory. Therefore, the overwriting duration is reduced by the erasing duration.
In the conventional flash memory system like the above-described one, each of the overwriting operations at the same logical address entails the disabling of the enabled area in which the original data is stored. The result is an increase in the number of the disabled areas. Accordingly, when the overwriting operation is repeated many times at the same logical address, the number of the disabled areas seriously increases compared with that of the enabled areas. Conventional flash memory systems capable of managing links between the enabled areas belonging to the separate physical blocks, fragment data streams such as files into areas, and writes the data streams discretely and randomly in blank areas scattered across the various physical blocks. In such a flash memory system, the per-physical-block rate of the disabled areas to the enabled areas is generally high because of the repetition of the overwriting operation.
In a flash memory, data items are erased only collectively in each of the physical blocks. Therefore, the conventional flash memory system cannot perform data erasing for many disabled areas inside the erasing target physical block when the physical block includes even one enabled area. Accordingly, the ratio of the disabled areas to the enabled areas cannot be reduced. As a result, in the conventional flash memory system, the repetition of the overwriting operation seriously reduces the amount of data that can be stored in the flash memory compared with the storage capacity of the flash memory.
An object of the present invention is to provide a flash memory system that reduces the ratio of disabled pages to enabled pages, thereby achieving an increase in the amounts of data that can be stored therein.